A pipeline in data processing refers to a set of processing elements where the output of one element is the input of another element. Pipelining a process involves dividing the process into a number of stages. Pipelining allows throughput to be increased as it enables different stages of the process to be executed simultaneously on two sets of data instead of waiting for the whole process to be completed for the first set of data before executing the process for the second set of data. Many electronic devices, such as system-on-chips (SoCs), include hardware components for implementing one or more pipelined processes.
Such devices are not typically implemented in hardware (e.g. silicon) until their hardware designs are verified because post-silicon error discovery can be very expensive. Where a hardware design includes logic for implementing a pipelined process in hardware, verifying the design includes verifying the logic for implementing the pipelined process.
Typically the logic for implementing a pipelined process in hardware is verified through data path verification. This involves determining that the data payload output from the pipelined process is correct. The data payload may or may not go through a functional transformation as it moves through the pipeline. For example, in some cases, two operands in a pipelined arithmetic process may go through addition or subtraction. Accordingly, data path verification includes establishing that the output data is correct (i.e. that any functional transformations are correct).
The embodiments described below are provided by way of example only and are not limiting to implementations which solve any or all of the disadvantages of known verification methods and systems.